Watch Jobs
浏览职位数据统计洞察报告探索企业定价
我的收藏免费试用登录注册

Watch Jobs

我们专注于实时追踪各企业最新职位动态,帮助您节省求职时间,快速找到理想工作机会。

探索

  • 浏览职位
  • 数据统计
  • 洞察报告
  • 数据方法论
  • 探索企业

订阅

  • 免费试用
  • 价格方案
  • 常见问题
  • 隐私政策

关注我们

微信公众号小红书淘宝店铺

© 2026 Watch Jobs. 保留所有权利

Created by jianglicat - 讲礼猫
Watch Jobs
浏览职位数据统计洞察报告探索企业定价
我的收藏免费试用登录注册

Qualcomm logo
高通
STCO Methodology & Framework Technologist, up to Staff
立即应聘

STCO Methodology & Framework Technologist, up to Staff

发布于 大约 12 小时前

普通员工/个人贡献者

Hsinchu City, Hsinchu City, Taiwan
中级经验
全职员工
仅现场办公
本科
Kpi Analysis
Soc Architecture
Semiconductor
2.5D/3D Integration
Stco
Data-Driven Framework
System-Level Modeling

AI 估算 · 35k–55k

Staff-level role at Qualcomm in Hsinchu, with strong demand for semiconductor methodology skills; competitive pay for experience

职位详情

关于这个职位

This role focuses on developing system-level STCO methodologies and frameworks for advanced SoC and chiplet-based platforms. You will build modular, data-driven frameworks integrating system KPIs, IP metrics, and packaging constraints to enable early-stage architecture exploration and trade-off analysis. The position involves prototyping concepts with Excel and migrating them to scalable Python frameworks.

最低要求

Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Experience in software development or engineering, with the ability to design and implement structured, maintainable technical frameworks.
Proficiency in Python or equivalent programming languages for data modeling, analysis, and framework development.
Strong Excel modeling skills, including the ability to:
Build structured, parametric models
Prototype early STCO concepts and decision flows
Support pilot-level demonstrations and cross-team technical reviews
Experience developing methodology, prototyping, or optimization tools for semiconductor technology analysis, system modeling, or architecture exploration.
Ability to integrate multi-source technical inputs, including system KPIs, IP metrics, technology node data, and packaging or thermal constraints.
Working knowledge of chiplet-based SoC architectures and 2.5D/3D integration concepts.
Solid understanding of system-level KPIs beyond PPAC, such as bandwidth, latency, thermal limits, and power integrity.
Experience with early design-space exploration, "what-if" analysis, and quantitative trade-off evaluation.

工作职责

This role focuses on developing system-level STCO methodologies and framework enablement, including pilot platforms to support early-stage chiplet-based optimization and trade-off analysis. The engineer builds modular, data-driven frameworks that integrate system KPIs, IP-level metrics, technology data, and thermal and packaging constraints to quantify system-level benefits beyond PPAC.

Early STCO concepts are prototyped using Excel-based models for rapid iteration and stakeholder alignment, and subsequently migrated into scalable Python-based frameworks for broader reuse and extensibility.

优先资格

Experience developing pilot or prototype tools that evolve into reusable engineering frameworks.

Strong data analysis and interpretation skills, with the ability to clearly communicate assumptions, insights, and conclusions.
Familiarity with semiconductor design enablement flows, EDA methodologies, or system-level modeling environments.
Ability to work independently in technically ambiguous problem spaces, while collaborating closely with domain experts.

AI 洞察

优缺点分析

优点

  • Work at the forefront of semiconductor methodology, directly impacting advanced chiplet and heterogeneous integration technologies.
  • High visibility role within a leading company (Qualcomm) with strong investment in R&D and AI-driven workloads.
  • Opportunity to develop both analytical and coding skills, with exposure to cross-functional teams (architecture, packaging, thermal).
  • Clear career ladder up to Staff/Principal levels with competitive compensation and benefits.
  • High technical ambiguity – you'll need to define problems and frameworks from scratch in a rapidly evolving field.
  • Requires strong communication to align diverse stakeholders (architecture, design, packaging) with sometimes conflicting priorities.
  • May involve tight deadlines for pilot demonstrations and iterative prototyping cycles.
  • Ideal for a semiconductor engineer with a strong analytical mindset, Python coding ability, and a passion for system-level optimization and early-stage architecture exploration.

缺点 / 挑战

暂无明显挑战项

角色解读

  • Progress to a senior technical lead or principal engineer driving next-generation methodology for complex SoCs.
  • Expand expertise into broader system architecture roles, influencing technology roadmaps across domains.
  • Opportunity to transition into management of a methodology team or become a recognized industry expert in STCO.
  • Develop system-level STCO (System Technology Co-Optimization) methodologies and frameworks for advanced chiplet-based SoCs.
  • Build modular, data-driven Python tools that integrate KPIs, IP metrics, packaging, and thermal data for early-stage architectural trade-off analysis.
  • Prototype concepts using Excel models for rapid iteration and stakeholder alignment, then migrate to scalable Python frameworks.
  • Collaborate with domain experts to evaluate system-level benefits beyond traditional PPAC metrics.
  • Proficiency in Python for data modeling and framework development.
  • Strong Excel modeling skills for building parametric models and prototyping.
  • Deep understanding of chiplet-based architectures, 2.5D/3D integration, and system-level KPIs like bandwidth, latency, and thermal limits.
  • Experience in semiconductor technology analysis, design-space exploration, and quantitative trade-off evaluation.

申请策略

  • Tailor your resume to show a blend of coding and semiconductor methodology experience, not just pure design.
  • In your cover letter, mention specific examples of how you've driven data-driven decisions in early-stage architecture.
  • Emphasize experience with Python-based data modeling, Excel parametric models, and any framework development for semiconductor analysis.
  • Highlight projects involving chiplet-based design, 2.5D/3D integration, or system-level trade-off studies (PPAC, thermal, etc.).
  • Showcase ability to work with ambiguous requirements and prototype solutions that evolve into production tools.
  • Mention any cross-functional collaboration and clear communication of technical insights.
  • Deepen Python skills, especially pandas, numpy, and any scripting for system modeling.
  • Familiarize yourself with EDA tools and system-level modeling environments (e.g., SystemC, MATLAB/Simulink).

面试指南

  • Use the STAR method for behavioral questions: Situation, Task, Action, Result, focusing on the technical methodology and impact.
  • For technical design questions, outline a structured approach: define objectives, list inputs/constraints, propose a modeling framework, discuss trade-offs, and suggest validation steps.
  • Demonstrate cross-functional thinking by referencing how your work integrates inputs from architecture, design, packaging, and thermal teams.
  • Describe a time you built a framework or tool to analyze trade-offs in semiconductor design. What metrics did you use?
  • How would you approach developing an STCO methodology for a new chiplet-based SoC? What factors would you consider?
  • Explain the difference between PPAC and other system-level KPIs like bandwidth, latency, and thermal integrity. How do they interact?
  • Given a set of IP metrics, packaging constraints, and target workloads, how would you build an Excel model to evaluate architecture options?
  • How do you handle ambiguous technical problems with limited data? Walk us through your process.

匹配度报告

69
综合匹配度

Cutting-edge semiconductor methodology role at Qualcomm with strong development potential, but on-site and moderate WLB.

适合人群
Best for an engineer driven by skill growth and technical challenges, willing to work on-site in a fast-paced semiconductor environment.
最强匹配
成长发展匹配
最弱匹配
工作生活匹配
薪资福利75
成长发展85
工作生活50
使命价值65

薪资福利匹配

75中等

Competitive salary and benefits typical of a large semiconductor firm like Qualcomm, though not explicitly mentioned in the JD. The location in Hsinchu and staff level suggest good compensation.

薪资信号未披露(AI估算:35K-55K/月)

成长发展匹配

85较高

Strong growth opportunities through cutting-edge technology (chiplet, STCO) and clear career ladder. The role involves developing reusable frameworks, which enhances skill development.

技术前沿前沿/新兴技术
技术栈Python、Excel、STCO、Chiplet、2.5D/3D Integration、System-Level Modeling、Data-Driven Framework、PPAC
成长机会pilot platforms、scalable Python-based frameworks、reusable engineering frameworks
业务类型ambiguous

工作生活匹配

50较低

On-site work in Hsinchu's science park, typical for semiconductor roles; no explicit WLB signals. May require some flexibility for project milestones.

工作模式仅现场办公
办公地点科技园/产业园
加班情况未提及(无法判断)

使命价值匹配

65中等

The role contributes to advanced semiconductor technology crucial for AI and computing, but does not directly address social or environmental impact. Moderate sense of purpose.

行业发展高速增长赛道
社会影响中性/一般
使命信号AI-driven workloads
创新程度积极采用新技术
Watch Jobs
Watch Jobs

我们专注于实时追踪各企业最新职位动态,帮助您节省求职时间,快速找到理想工作机会。

探索

  • 浏览职位
  • 数据统计
  • 洞察报告
  • 数据方法论
  • 探索企业

订阅

  • 免费试用
  • 价格方案
  • 常见问题
  • 隐私政策

关注我们

微信公众号小红书淘宝店铺

© 2026 Watch Jobs. 保留所有权利

Created by jianglicat - 讲礼猫

高通 的其他在招职位

  • ISP Design Engineer, up to Staff

    高通 · Taipei, Taipei City, Taiwan
    AI 估算 · 20k-35k
  • AI Software Engineer

    高通 · 西安市
    AI 估算 · 18k-32k
  • Software Applications Engineer, Wi-Fi - Shanghai

    高通 · 上海市
    AI 估算 · 20k-35k
  • Gaming Software Engineer

    高通 · 深圳市
    AI 估算 · 25k-45k
  • Data Center BIOS engineer

    高通 · Taipei, Taipei City, Taiwan
    AI 估算 · 25k-45k

相似职位推荐

  • EDU Hardware Engineer

    奔驰 · 上海市
    AI 估算 · 25k-40k
  • E/E Eng. EMob

    舍弗勒 · 天津市
    AI 估算 · 15k-25k
  • 电源硬件工程师

    舍弗勒 · 天津市
    AI 估算 · 15k-25k
  • 车载电源硬件工程师 E/E (深圳)

    舍弗勒 · 深圳市
    AI 估算 · 15k-25k
  • 功率模块电子工程师

    舍弗勒 · 天津市
    AI 估算 · 10k-18k

高通 的其他在招职位

  • ISP Design Engineer, up to Staff

    高通 · Taipei, Taipei City, Taiwan
    AI 估算 · 20k-35k
  • AI Software Engineer

    高通 · 西安市
    AI 估算 · 18k-32k
  • Software Applications Engineer, Wi-Fi - Shanghai

    高通 · 上海市
    AI 估算 · 20k-35k
  • Gaming Software Engineer

    高通 · 深圳市
    AI 估算 · 25k-45k
  • Data Center BIOS engineer

    高通 · Taipei, Taipei City, Taiwan
    AI 估算 · 25k-45k

相似职位推荐

  • EDU Hardware Engineer

    奔驰 · 上海市
    AI 估算 · 25k-40k
  • E/E Eng. EMob

    舍弗勒 · 天津市
    AI 估算 · 15k-25k
  • 电源硬件工程师

    舍弗勒 · 天津市
    AI 估算 · 15k-25k
  • 车载电源硬件工程师 E/E (深圳)

    舍弗勒 · 深圳市
    AI 估算 · 15k-25k
  • 功率模块电子工程师

    舍弗勒 · 天津市
    AI 估算 · 10k-18k