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STCO System Architecture Technologist, up to Sr. Staff
STCO System Architecture Technologist, up to Sr. Staff
发布于 大约 12 小时前普通员工/个人贡献者
Hsinchu City, Hsinchu City, Taiwan
高级经验
全职员工
仅现场办公
本科
HPC
Soc Architecture
Ai Inference
2.5D/3D Integration
Stco
System Kpis
AI 估算 · 30k–50k
High-level system architecture role at major semiconductor company; specialized skills in STCO and AI drive premium compensation
职位详情
关于这个职位
This role focuses on system-level architecture definition and technology pathfinding for advanced SoCs and chiplet-based platforms at Qualcomm. You will drive early architecture, packaging, and technology trade-off decisions for next-generation products, with an emphasis on AI-driven workloads, system efficiency, and scalability. You will work closely with cross-functional teams to translate requirements into quantitative system KPIs and figures of merit.
最低要求
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Experience with 2.5D and 3D STCO architecture and pathfinding, including chiplet-based SoC systems.
Strong understanding of system-level KPIs, including bandwidth, latency, performance-per-watt, thermal behavior, power integrity, yield, and cost, and how these depend on architecture, process technology, and packaging.
Solid knowledge of heterogeneous SoC and chiplet architectures, including partitioning across compute, accelerators, memory, and I/O, with understanding of trade-offs impacting inter-die communication, memory hierarchy, power delivery, thermal coupling, manufacturability, and system cost.
Experience with workload-driven system design, particularly for AI inference, AI acceleration, HPC, or high-performance compute use cases.
Understanding of AI system efficiency metrics, including tokens per second, tokens per watt, and cost per token, and how these metrics are influenced by architecture, memory bandwidth, interconnect, power, and thermal constraints.
Ability to evaluate how system architecture and packaging decisions impact AI inference cost per token and overall system efficiency.
Solid understanding of 2.5D/3D integration schemes, such as interposer-based designs and stacked die concepts, and their implications on system planning.
Awareness of advanced packaging constraints, including thermal management, power delivery, and mechanical considerations in multi-die systems.
Basic programming proficiency (e.g., Python or equivalent) to support system modeling or architectural trade-off analysis.
工作职责
Drive system-level STCO architecture definition and pathfinding for advanced SoCs leveraging 2.5D/3D and chiplet-based architectures.
Define system KPIs beyond PPAC, evaluate architecture–technology–packaging trade-offs, and support early, high-impact design decisions for future platforms.
Translate system and workload requirements into quantitative figures of merit (FOMs), including performance, power, thermal, yield, and AI efficiency and cost metrics, to support structured system-level KPI evaluation and STCO decision platforms.
AI 洞察
优缺点分析
优点
- Work at the forefront of semiconductor architecture with cutting-edge 2.5D/3D and chiplet technologies.
- High-impact role defining KPIs for future Qualcomm products, especially in AI-driven workloads.
- Collaboration with top-tier architecture, packaging, and technology teams across the company.
- Competitive compensation and benefits typical of a global tech leader.
- High complexity and ambiguity in early-stage architecture definition requires strong analytical skills.
- Need to balance multiple competing constraints (performance, power, thermal, cost) across different teams.
- Fast-paced environment with aggressive product cycles
- may involve occasional extended hours.
- This role is ideal for experienced ASIC/system architects with a passion for pushing the boundaries of SoC integration and AI efficiency, who thrive in cross-functional, ambiguous environments.
缺点 / 挑战
暂无明显挑战项
角色解读
- Progress to senior staff or principal architect roles, leading technology roadmaps for next-gen SoCs.
- Expand into broader system architecture or technical leadership positions within Qualcomm's ASICS Engineering.
- Opportunity to influence industry standards in AI acceleration and advanced packaging.
- Define system-level architecture and technology pathfinding for advanced SoCs with 2.5D/3D and chiplet integration.
- Drive early trade-off decisions involving architecture, packaging, and process technology for next-gen products.
- Translate workload requirements into quantitative KPIs covering performance, power, thermal, yield, and AI efficiency.
- Collaborate with cross-functional teams to enable consistent system-level evaluation across product generations.
- Deep expertise in STCO architecture, 2.5D/3D integration, and chiplet-based SoC design.
- Strong understanding of system KPIs such as bandwidth, latency, power, thermal, yield, and cost.
- Workload-driven design experience, particularly for AI inference and HPC.
- Basic programming proficiency (e.g., Python) for system modeling and trade-off analysis.
申请策略
- Tailor your resume to clearly demonstrate impact in defining system KPIs and driving architecture decisions.
- Prepare to discuss specific examples of how you resolved trade-offs among performance, power, and cost.
- Emphasize experience with 2.5D/3D architectures, chiplet designs, and system-level KPI definition.
- Showcase projects involving AI workload analysis, performance modeling, or trade-off studies.
- Highlight cross-functional collaboration and ability to drive early architecture decisions.
- Include programming skills (Python, modeling) and any contributions to advanced packaging.
- Deepen knowledge of AI inference metrics (tokens per second/watt/cost) and their architecture dependencies.
- Get hands-on with system-level modeling tools (e.g., Python-based simulators) for early trade-off analysis.
面试指南
- Use the STAR method (Situation, Task, Action, Result) to structure responses with clear context and impact.
- For technical questions, start with first principles (e.g., system constraints) and then show quantitative reasoning.
- Demonstrate cross-functional thinking by considering architecture, packaging, and technology together.
- How would you approach defining system-level KPIs for a new chiplet-based AI accelerator?
- Describe a time you had to make a trade-off between performance and power at the architecture level.
- Can you explain the impact of 2.5D vs 3D integration on thermal management and yield?
- How do you evaluate the cost per token for an AI inference chip and what factors affect it?
- Walk us through your experience with workload-driven design for HPC or AI use cases.
匹配度报告
74
综合匹配度
High-impact architecture role at leading semiconductor company, offering strong career development in advanced SoC and AI technologies, with typical R&D demands.
适合人群
Best suited for candidates prioritizing technical growth and cutting-edge work over work-life balance.
最强匹配
成长发展匹配
最弱匹配
工作生活匹配
薪资福利80
成长发展85
工作生活60
使命价值70
薪资福利匹配
80较高
Competitive compensation typical for senior roles at Qualcomm, though exact salary not disclosed. Benefits include standard semiconductor industry perks.
薪资信号未披露（AI估算：30K-50K/月）
福利待遇equal opportunity employer、reasonable accommodations for disabilities
成长发展匹配
85较高
Strong growth opportunities in cutting-edge architecture domains; clear technical ladder and leadership potential. High exposure to next-gen technologies.
技术前沿前沿/新兴技术
技术栈STCO、2.5D/3D、chiplet、AI inference、HPC、system KPIs
业务类型ambiguous
工作生活匹配
60中等
On-site role in Hsinchu; no explicit WLB signals. May involve typical R&D intensity.
工作模式仅现场办公
办公地点科技园/产业园
加班情况未提及（无法判断）
使命价值匹配
70中等
Contributes to advancing AI and semiconductor technology, with potential societal impact through efficient computing. Industry growth is strong.
行业发展高速增长赛道
社会影响中性/一般
创新程度积极采用新技术
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