
STCO System Architecture Technologist, up to Sr. Staff
发布于 大约 2 个月前普通员工/个人贡献者
AI 估算 · 30k–50k
High-level system architecture role at major semiconductor company; specialized skills in STCO and AI drive premium compensation
职位详情
关于这个职位
This role focuses on system-level architecture definition and technology pathfinding for advanced SoCs and chiplet-based platforms at Qualcomm. You will drive early architecture, packaging, and technology trade-off decisions for next-generation products, with an emphasis on AI-driven workloads, system efficiency, and scalability. You will work closely with cross-functional teams to translate requirements into quantitative system KPIs and figures of merit.
最低要求
Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
工作职责
Drive system-level STCO architecture definition and pathfinding for advanced SoCs leveraging 2.5D/3D and chiplet-based architectures.
AI 洞察
优缺点分析
优点
- Work at the forefront of semiconductor architecture with cutting-edge 2.5D/3D and chiplet technologies.
- High-impact role defining KPIs for future Qualcomm products, especially in AI-driven workloads.
- Collaboration with top-tier architecture, packaging, and technology teams across the company.
- Competitive compensation and benefits typical of a global tech leader.
- High complexity and ambiguity in early-stage architecture definition requires strong analytical skills.
- Need to balance multiple competing constraints (performance, power, thermal, cost) across different teams.
- Fast-paced environment with aggressive product cycles
- may involve occasional extended hours.
- This role is ideal for experienced ASIC/system architects with a passion for pushing the boundaries of SoC integration and AI efficiency, who thrive in cross-functional, ambiguous environments.
缺点 / 挑战
暂无明显挑战项
角色解读
- Progress to senior staff or principal architect roles, leading technology roadmaps for next-gen SoCs.
- Expand into broader system architecture or technical leadership positions within Qualcomm's ASICS Engineering.
- Opportunity to influence industry standards in AI acceleration and advanced packaging.
- Define system-level architecture and technology pathfinding for advanced SoCs with 2.5D/3D and chiplet integration.
- Drive early trade-off decisions involving architecture, packaging, and process technology for next-gen products.
- Translate workload requirements into quantitative KPIs covering performance, power, thermal, yield, and AI efficiency.
- Collaborate with cross-functional teams to enable consistent system-level evaluation across product generations.
- Deep expertise in STCO architecture, 2.5D/3D integration, and chiplet-based SoC design.
- Strong understanding of system KPIs such as bandwidth, latency, power, thermal, yield, and cost.
- Workload-driven design experience, particularly for AI inference and HPC.
- Basic programming proficiency (e.g., Python) for system modeling and trade-off analysis.
申请策略
- Tailor your resume to clearly demonstrate impact in defining system KPIs and driving architecture decisions.
- Prepare to discuss specific examples of how you resolved trade-offs among performance, power, and cost.
- Emphasize experience with 2.5D/3D architectures, chiplet designs, and system-level KPI definition.
- Showcase projects involving AI workload analysis, performance modeling, or trade-off studies.
- Highlight cross-functional collaboration and ability to drive early architecture decisions.
- Include programming skills (Python, modeling) and any contributions to advanced packaging.
- Deepen knowledge of AI inference metrics (tokens per second/watt/cost) and their architecture dependencies.
- Get hands-on with system-level modeling tools (e.g., Python-based simulators) for early trade-off analysis.
面试指南
- Use the STAR method (Situation, Task, Action, Result) to structure responses with clear context and impact.
- For technical questions, start with first principles (e.g., system constraints) and then show quantitative reasoning.
- Demonstrate cross-functional thinking by considering architecture, packaging, and technology together.
- How would you approach defining system-level KPIs for a new chiplet-based AI accelerator?
- Describe a time you had to make a trade-off between performance and power at the architecture level.
- Can you explain the impact of 2.5D vs 3D integration on thermal management and yield?
- How do you evaluate the cost per token for an AI inference chip and what factors affect it?
- Walk us through your experience with workload-driven design for HPC or AI use cases.
职位点评
High-impact architecture role at leading semiconductor company, offering strong career development in advanced SoC and AI technologies, with typical R&D demands.
薪资福利
Competitive compensation typical for senior roles at Qualcomm, though exact salary not disclosed. Benefits include standard semiconductor industry perks.
成长发展
Strong growth opportunities in cutting-edge architecture domains; clear technical ladder and leadership potential. High exposure to next-gen technologies.
工作生活
On-site role in Hsinchu; no explicit WLB signals. May involve typical R&D intensity.
使命价值
Contributes to advancing AI and semiconductor technology, with potential societal impact through efficient computing. Industry growth is strong.
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