
普通员工/个人贡献者
AI 估算 · 25k–40k
Senior packaging engineer with specialized FEA skills, competitive compensation for semiconductor industry in Taiwan.
This role is for a Senior/Staff IC Packaging Engineer focused on mechanical simulation. You will use FEA (ANSYS) to perform warpage, stress, solder joint reliability, and chip-package interaction analysis for advanced semiconductor packages. You'll work closely with design, NPI, and CPI teams to support high-volume manufacturing and next-generation packaging technologies.
Master’s degree in mechanical engineering, Material science, Electrical/Microelectronics, or related engineering field.
Develop mechanical FEA models (preferably using ANSYS APDL and Workbench)
Ph. D degree in Mechanical engineering, Material science, Electrical/Microelectronics, or related engineering field.
优点
缺点 / 挑战
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Specialized FEA role at Qualcomm Taiwan, strong technical development but on-site and flexible hours required.
The role offers competitive compensation typical for senior engineers at a top semiconductor company, with base salary and likely benefits. However, exact figures are not disclosed.
Strong growth potential due to specialized skills in FEA for advanced packaging, exposure to cutting-edge technologies, and opportunities to publish research.
The job is on-site in Hsinchu, with occasional travel and flexible hours required for global collaboration. Work-life balance may be moderate.
The role contributes to Qualcomm's chip technology leadership, impacting consumer electronics and wireless communications. Moderate social impact.