Watch Jobs
浏览职位数据统计洞察报告招聘观察探索企业购买与订阅
我的收藏免费试用登录注册

Watch Jobs

我们专注于实时追踪各企业最新职位动态,帮助您节省求职时间,快速找到理想工作机会。

探索

  • 浏览职位
  • 数据统计
  • 洞察报告
  • 数据方法论
  • 探索企业

订阅

  • 免费试用
  • 价格方案
  • 常见问题
  • 隐私政策

关注我们

微信公众号小红书淘宝店铺

© 2026 Watch Jobs. 保留所有权利

Created by jianglicat - 讲礼猫
Watch Jobs
浏览职位数据统计洞察报告招聘观察探索企业购买与订阅
我的收藏免费试用登录注册

Cisco logo
思科
ASIC Packaging Development Technical Leader
立即应聘

ASIC Packaging Development Technical Leader

发布于 大约 3 小时前

普通员工/个人贡献者

Taipei, New Taipei, Taiwan
专家级经验
全职员工
仅现场办公
本科
硬件工程
ASIC
Cowos
Pi/Si
Dfm/Dfr
Rdl
2.5D/3D Packaging
Co-Packaged Optics
Heterogeneous Integration
Substrate Manufacturing

AI 估算 · 25k–45k

资深半导体封装技术领导,思科品牌,台湾地区薪资水平中等偏上,按年薪约45-78万人民币折算月薪。

职位详情

关于这个职位

You will join Cisco's ASIC Common Architecture Group as a technical leader in advanced packaging development, focusing on cutting-edge 2.5D/3D packaging, Co-Packaged Optics, and assembly technologies for high-performance network ASICs. You will collaborate with internal design teams and external suppliers to drive innovation from concept to production.

最低要求

· BS/MS/PhD in Mechanical Engineering, Materials Science, Physics or a closely related field

· 8+ years of progressive experience in Semiconductor Packaging and Assembly Industry, with demonstrated skill and experience leading technical projects or initiatives
· Previously proven experience in advanced packaging technology development and execution, such as 2.5D/3D process integration, heterogenous integration, wafer-level packaging, and package technology qualification method.
· Comprehensive knowledge and understanding of advanced CoWoS package assembly and manufacturing flow.
· Good understanding of Co-packaged Optics and Co-packaged Copper design and process integration
· Previous experience with substrate manufacturing processes, design rules and material for high layer count substrate stack-up including multi-layer core technology and impacts to device level power and signal integrity.
· Experience with package design physical attribute, material selection and package assembly process optimization for package warpage, stress and thermal performance.
· Fluent in English and Chinese Mandarin communication.

工作职责

· Serve as a technical expert for advanced packaging technologies (2.5D/3D with RDL CoW processes, large body packaging assembly, Co-Packaged Optics, Co-Packaged Copper), design and integration. Work directly with key suppliers to develop and enable new processes, module and material for areas of package design, assembly, integration and substrate manufacturing.

· Develop test vehicle strategy and design for advanced package technologies with 2.5D/3D integration stacking process.
· Engage with leading assembly suppliers to understand assembly process, module design rules and requirements.
· Define assembly process integration and flow for advanced heterogeneous integration including Co-packaged Optics and Co-packaged Copper package integration solution.
· Develop comprehensive plan to evaluate and qualify new package technologies.
· Work closely with substrate suppliers to evaluate new materials & design rules for package warpage, stress, and SI/PI performance optimization to enable and advance product substrate physical design and implementation.
· Work with internal package physical design team to resolve design challenges and implement working solutions using DfM/DfR principles.
· Work with OSAT and substrate suppliers to develop practical solutions that address challenges of large body size package and large die reticle size assembly, reliability and board-mount process.

优先资格

· Expertise in advanced problem-solving methodologies (e.g. 8D, FMEA, statistical process control) and data analysis skills

· Effective communication, presentation, and influencing skills, with the ability to articulate technical concepts clearly to diverse audiences.
· Experience in package reliability for component and board level
· Willingness to learn and evolve professionally.

AI 洞察

优缺点分析

优点

  • Work on cutting-edge packaging technology that directly impacts Cisco's high-performance ASICs.
  • Collaborate with top-tier global suppliers and internal world-class teams.
  • High visibility and technical leadership opportunity in a stable, established company.
  • Requires deep technical expertise and continuous learning in a fast-evolving field.
  • May involve significant cross-geography collaboration and frequent supplier engagements.
  • High expectations for independent problem-solving and driving complex projects to completion.
  • This role is ideal for experienced packaging engineers who thrive on technical challenges, want to lead innovation, and enjoy working with global teams.

缺点 / 挑战

暂无明显挑战项

角色解读

  • Progress to Senior/Principal Technologist or Technical Director within Cisco's ASIC organization.
  • Expand influence into broader hardware system architecture or supply chain leadership roles.
  • Become a recognized industry expert in advanced packaging, shaping future technology roadmaps.
  • Drive the development of advanced packaging technologies (2.5D/3D, Co-Packaged Optics) for next-generation ASICs.
  • Collaborate with internal design teams and external suppliers to define assembly processes, material selection, and design rules.
  • Lead test vehicle design and qualification plans to ensure manufacturing readiness and reliability.
  • Deep expertise in semiconductor packaging, especially 2.5D/3D integration and CoWoS processes.
  • Strong understanding of substrate manufacturing, warpage/stress optimization, and SI/PI performance.
  • Ability to lead technical projects and communicate effectively with cross-functional teams and suppliers.

申请策略

  • Tailor your resume to reflect packaging technology leadership and cross-functional collaboration.
  • Prepare to discuss recent trends in heterogeneous integration and how you've contributed.
  • Emphasize hands-on experience with advanced packaging technologies (2.5D/3D, CoWoS, RDL).
  • Highlight leadership roles in technical projects, including supplier engagement and process development.
  • Showcase specific examples of solving packaging challenges (warpage, stress, reliability).
  • Deepen knowledge of Co-Packaged Optics and Copper integration if not already familiar.
  • Strengthen data analysis and problem-solving methodologies (e.g., FMEA, SPC).

面试指南

  • Use STAR method: Situation, Task, Action, Result, focusing on your role as technical leader.
  • Demonstrate systematic problem-solving: define the problem, analyze options, collaborate with experts, and validate solutions.
  • Show ability to communicate technical concepts to diverse audiences (designers, suppliers, management).
  • Describe a challenging packaging project you led and how you resolved technical issues.
  • How do you evaluate new packaging technologies and decide on qualification plans?
  • Explain your approach to working with suppliers to develop new processes or materials.
  • How do you balance design trade-offs between performance, cost, and manufacturability?
  • What is your experience with Co-Packaged Optics or similar advanced integration?

职位点评

70
综合评分

Cutting-edge packaging technology leadership at Cisco, strong development opportunities but limited flexibility.

更适合这类人
This position is best suited for candidates who prioritize technical growth and leadership over work-life balance or immediate compensation details.
表现最好
成长发展
相对薄弱
工作生活
薪资福利75
成长发展85
工作生活50
使命价值70

薪资福利

75中等

The role offers competitive compensation typical for senior technical positions at Cisco in Taiwan, but exact figures are not disclosed. Benefits like health insurance and stock options are likely provided.

薪资信号未披露(AI估算:25K-45K/月)

成长发展

85较高

This is a highly developmental role with exposure to cutting-edge packaging technologies and significant technical leadership opportunities. The JD mentions working on frontier technologies and collaborating with global experts.

技术前沿前沿/新兴技术
技术栈2.5D/3D、CoWoS、Co-Packaged Optics、heterogeneous integration
成长机会leadership opportunity、technical scope、opportunity to contribute
业务类型ambiguous

工作生活

50较低

The role is based in Taipei, likely on-site with no mention of flexible working. The semiconductor industry often requires in-person collaboration, though Cisco may offer some flexibility.

工作模式仅现场办公
办公地点未明确
加班情况未提及(无法判断)

使命价值

70中等

The role contributes to Cisco's networking infrastructure, which powers global communications. While not directly impacting social good, the technology is essential for AI and data connectivity.

行业发展高速增长赛道
社会影响中性/一般
创新程度积极采用新技术
Watch Jobs
Watch Jobs

我们专注于实时追踪各企业最新职位动态,帮助您节省求职时间,快速找到理想工作机会。

探索

  • 浏览职位
  • 数据统计
  • 洞察报告
  • 数据方法论
  • 探索企业

订阅

  • 免费试用
  • 价格方案
  • 常见问题
  • 隐私政策

关注我们

微信公众号小红书淘宝店铺

© 2026 Watch Jobs. 保留所有权利

Created by jianglicat - 讲礼猫

思科 的其他在招职位

  • Mechanical Engineering Technical Leader

    思科 · Taipei, New Taipei, Taiwan
    AI 估算 · 30k-50k
  • Component Engineering Technical Leader

    思科 · Taipei, New Taipei, Taiwan
    AI 估算 · 45k-60k
  • ASIC Package Engineer

    思科 · Taipei, New Taipei, Taiwan
    AI 估算 · 30k-50k
  • Account Executive - Portfolio

    思科 · Taipei, New Taipei, Taiwan
    AI 估算 · 25k-45k
  • Associate Solutions Engineer

    思科 · Taipei, New Taipei, Taiwan
    AI 估算 · 12k-18k

相似职位推荐

  • Automation Engineer

    默克生命科学 · Kaohsiung, Kaohsiung, Taiwan
    AI 估算 · 10k-20k
  • Staff Packaging Engineer

    高通 · 深圳市
    AI 估算 · 30k-45k
  • Vehicle Network Engineer (RD4.0 B3)

    奔驰 · 北京市
    AI 估算 · 25k-40k
  • POD Integration Manager

    伊顿中国 · 深圳市
    AI 估算 · 25k-45k
  • Lead Hardware Engineer

    伊顿中国 · 西安市
    AI 估算 · 25k-40k

思科 的其他在招职位

  • Mechanical Engineering Technical Leader

    思科 · Taipei, New Taipei, Taiwan
    AI 估算 · 30k-50k
  • Component Engineering Technical Leader

    思科 · Taipei, New Taipei, Taiwan
    AI 估算 · 45k-60k
  • ASIC Package Engineer

    思科 · Taipei, New Taipei, Taiwan
    AI 估算 · 30k-50k
  • Account Executive - Portfolio

    思科 · Taipei, New Taipei, Taiwan
    AI 估算 · 25k-45k
  • Associate Solutions Engineer

    思科 · Taipei, New Taipei, Taiwan
    AI 估算 · 12k-18k

相似职位推荐

  • Automation Engineer

    默克生命科学 · Kaohsiung, Kaohsiung, Taiwan
    AI 估算 · 10k-20k
  • Staff Packaging Engineer

    高通 · 深圳市
    AI 估算 · 30k-45k
  • Vehicle Network Engineer (RD4.0 B3)

    奔驰 · 北京市
    AI 估算 · 25k-40k
  • POD Integration Manager

    伊顿中国 · 深圳市
    AI 估算 · 25k-45k
  • Lead Hardware Engineer

    伊顿中国 · 西安市
    AI 估算 · 25k-40k