
普通员工/个人贡献者
AI 估算 · 35k–55k
高级IC职位,Cadence为上市大厂,新竹薪资水平较高,技能要求高,市场竞争力强。
As a Sr Principal Software Engineer at Cadence, you will develop advanced algorithms for EDA extraction tools, working on cutting-edge semiconductor design challenges. You will collaborate with R&D and QA teams to enhance tool scalability and performance. This role requires deep C++ expertise and a strong background in algorithms or electromagnetics.
Master's degree in Electrical Engineering, Computer Science, Physics, or Mathematics, along with a minimum of two years of relevant experience, is preferred. Alternatively, a Bachelor's degree in a related field with at least four years of experience will be considered. Strong candidates with a Ph.D. and relevant research background are also encouraged to apply. Demonstrated proficiency in C++ programming and familiarity with basic scripting languages. Excellent communication skills, ability to work independently, strong analytical and problem-solving abilities, and an aptitude for collaborative teamwork are required.
Develop and implement advanced algorithms to enhance the scalability and throughput of extraction processes. Maintain and expand existing codebases to address various customer requirements. Collaborate with Research and Development, Foundry, and Quality Assurance teams to ensure comprehensive requirement coverage and successful feature delivery.
Expertise in capacitance extraction, device modeling, interconnect modeling, electromagnetic simulation, timing simulation, or experience with place-and-route tools is highly desirable.
优点
缺点 / 挑战
暂无明显挑战项
Senior IC role in EDA at a stable industry leader, offering strong technical development but on-site commitment in Hsinchu.
Cadence offers competitive compensation and benefits for senior roles, though exact figures are not disclosed. The position is stable with a global company.
The role involves advanced algorithm development in a key EDA domain, with opportunities to work on cutting-edge technology and collaborate with experts. Growth signals like mentorship or promotion are not explicit, but the senior title implies career progression.
The position is on-site in Hsinchu, Taiwan. Work-life balance signals are not mentioned; however, Cadence typically offers reasonable hours. The location is a tech hub, but commute may vary.
EDA is a critical enabler for semiconductor advancement, contributing to Moore's Law and technology innovation. The work has indirect social impact through enabling better chips. The company emphasizes 'work that matters'.