
普通员工/个人贡献者
AI 估算 · 18k–28k
中级软件工程师,EDA行业,台湾新竹,薪酬水平较高,结合市场行情估算。
This role involves designing and developing next-generation formal verification technologies for leading semiconductor companies. You will work on core algorithms, formal engines, and user interfaces, collaborating with global R&D teams. The position offers strong technical impact and the opportunity to shape advanced EDA tools.
Master's or PhD in Computer Science, Electrical Engineering, or a related field.
Design and develop core algorithms, data models, software components, and user interfaces for Conformal products.
Experience with logic optimization, Boolean or graph-based algorithms.
优点
缺点 / 挑战
暂无明显挑战项
Strong technical impact and learning opportunities in formal verification, but on-site only and no remote flexibility.
Cadence offers competitive compensation for intermediate engineers in Hsinchu, with stable benefits from a large public company. However, specific salary details are not disclosed in the JD.
The role involves cutting-edge formal verification technologies, AI integration, and rapid prototyping, offering strong technical growth. Collaboration with global teams enhances learning opportunities.
The job requires on-site presence in Hsinchu with no mention of remote work or flexible hours. Office location type is not specified, but likely a tech park environment.
Working on formal verification contributes to semiconductor design correctness, which has a positive impact on technology reliability. The EDA industry is stable, but the role is not directly mission-driven.