Sr./Staff Design Engineer (DCDC) (Taipei/Hsinchu)
发布于 1 天前普通员工/个人贡献者
AI 估算 · 40k–60k
Senior analog IC design roles with 3+ years experience command high compensation due to scarce talent and critical skill set.
职位详情
关于这个职位
This senior/staff design engineer role focuses on developing power management ICs (PMICs) for DCDC converters, LDOs, load switches, and eFuses. You will work on mixed-signal circuit design from transistor to system level, participate in the full product development cycle, and collaborate with layout and test teams. The position requires deep analog circuit design expertise and experience with buck/boost topologies.
最低要求
PhD / MSEE with 3+ years of Analog circuit design experience
工作职责
Works on mixed-signal power management IC design, circuit synthesis from the transistor/resistor level up to the system level, simulation, layout supervision.
优先资格
High voltage design experience is a plus.
AI 洞察
优缺点分析
优点
- Work on cutting-edge power management ICs that are mission-critical in consumer, enterprise, and automotive applications.
- Join a fast-growing semiconductor leader with strong R&D investment and global impact.
- Gain deep expertise in analog/mixed-signal design—a highly valued skill set in the industry.
- Exposure to full product lifecycle from concept to mass production.
- Requires intensive attention to detail and long hours during tape-out cycles.
- Analog design has a steep learning curve
- continuous learning of new topologies and process nodes is necessary.
- Competition from top-tier IC design houses in Taiwan and globally may drive high pressure.
- This role is ideal for experienced analog engineers passionate about power management IC design, seeking technical depth and career growth in a dynamic semiconductor company.
缺点 / 挑战
暂无明显挑战项
角色解读
- Advance to principal/distinguished engineer or technical fellow, leading complex chip designs.
- Transition to system architect or team lead roles in power management product lines.
- Deepen expertise in emerging areas like GaN/SiC power ICs or data center power solutions.
- Design power management ICs such as buck/boost converters, LDOs, and load switches from transistor level to system level.
- Perform mixed-signal circuit simulation, layout supervision, and design verification using tools like SIMPLIS.
- Collaborate with cross-functional teams (product definition, layout, ATE) throughout the product lifecycle.
- Contribute to design-for-test methodologies to ensure high-quality production test coverage.
- Deep understanding of analog/power management circuit topologies (buck, boost, LDO, etc.) and high-voltage design.
- Proficiency in mixed-signal IC design, including ADCs, DACs, amplifiers, and op-amps.
- Hands-on experience with simulation tools (SIMPLIS, SPICE) and layout supervision.
- Strong problem-solving and communication skills for multi-site collaboration.
申请策略
- Tailor your resume to directly address the required topologies (buck/boost/LDO) mentioned in the job description.
- Be prepared to discuss your design methodology and how you handle trade-offs in power ICs.
- Showcase analog/power design projects with specific topologies (buck, boost, LDO, etc.) and simulate results.
- Emphasize experience with mixed-signal blocks (ADC, DAC, PLL) and any high-voltage design work.
- Highlight proficiency with simulation tools (SIMPLIS, Cadence, etc.) and layout supervision.
- Include any publications, patents, or tape-out successes to demonstrate practical impact.
- Strengthen understanding of control loop stability and compensation techniques for DC-DC converters.
- Gain hands-on experience with high-voltage process nodes (BCD, etc.) if not already familiar.
面试指南
- Use the STAR method: Situation, Task, Action, Result to structure your answers for behavioral questions.
- For technical questions, first outline the theory, then walk through your design flow, and conclude with real project examples.
- Explain how you design a buck converter for high efficiency at light load.
- Describe a challenging analog circuit you designed and how you resolved stability issues.
- How do you approach layout parasitic extraction and optimization for power ICs?
- What is your experience with SIMPLIS modeling for system-level simulation?
- How do you ensure robust operation of an LDO across process, voltage, and temperature corners?
- Review fundamental analog circuit concepts (feedback, stability, noise) and power management topologies.
职位点评
Senior analog IC design role at a fast-growing semiconductor leader, offering strong technical growth and competitive pay, but with on-site commitment and typical industry intensity.
从薪资福利、成长空间、工作节奏和岗位方向综合评估，方便横向比较。
薪资福利
The salary is competitive for senior analog IC designers in Taiwan, with potential for bonuses and stock options. However, specific benefits like retirement plans or health insurance are not mentioned.
成长发展
The role involves working on advanced power ICs and full product cycles, offering strong technical growth. MPS is a technology leader, and the job mentions participation in product definition and ATE development, indicating learning opportunities.
工作生活
The job is on-site in Taipei/Hsinchu, typical for semiconductor roles. No WLB information is provided, but the industry often involves tight schedules.
使命价值
MPS contributes to sustainability and energy efficiency through power management, but the direct social impact is moderate for an IC design role.