Staff Engineer, Diagnostic Development
发布于 3 小时前普通员工/个人贡献者
值不值得投
综合评分 83
Cutting-edge AI hardware-software role with exceptional technical growth, highly competitive compensation, and hybrid work flexibility.
从薪资福利、成长空间、工作节奏和岗位方向综合评估，方便横向比较。
薪资怎么样
10万
比测试开发中位数高
发布情况
新岗位 · 今天发布
公司情况
公司还在招多个职位
6 个在招
市场机会
选择不多
新北 · 测试开发 · 2 个在招
职位详情
关于这个职位
As a Staff Engineer in Diagnostic Development, you will design and develop diagnostics software to validate and stress-test ASICs, boards, and AI compute systems. You will work closely with firmware, hardware, and ASIC teams to debug complex system-level issues and enhance diagnostics infrastructure for scalability and performance.
最低要求
Strong technical contributor with the ability to design and develop diagnostics software to validate and stress-test ASICs, boards, and AI compute systems.
工作职责
Design and develop diagnostics software to validate and stress-test ASICs, boards, and AI compute systems.
AI 洞察
优缺点分析
优点
- Opportunity to work on cutting-edge AI compute solutions and high-performance RISC-V CPUs.
- Highly collaborative environment with cross-functional exposure to firmware, ASIC, and manufacturing.
- Strong impact on product quality and performance of next-generation AI platforms.
- Complexity of debugging system-level issues across hardware and software boundaries.
- Navigating U.S. export control compliance which may restrict certain candidates.
- High technical bar requiring deep understanding of both hardware and software domains.
- Engineers who are passionate about working close to the metal, enjoy hardware-software co-design, and want to make a significant impact in the AI computing space.
缺点 / 挑战
暂无明显挑战项
角色解读
- Transition into senior technical leadership roles within hardware-software integration.
- Deepen expertise in next-gen AI compute platforms and pre/post-silicon validation.
- Lead cross-functional initiatives to shape the future of AI computing architecture.
- Design and develop diagnostics software to validate and stress-test ASICs, boards, and AI compute systems.
- Debug complex system-level issues using tools like JTAG and hardware interfaces.
- Collaborate with cross-functional teams including firmware, ASIC, and manufacturing to ensure product quality.
- Strong proficiency in writing code close to the metal and debugging hardware.
- Experience with system-level debugging tools like JTAG and hardware interfaces.
- Ability to design scalable diagnostics infrastructure and stress-test complex SoC hardware.
申请策略
- Ensure you meet the U.S. export control eligibility requirements before applying.
- Emphasize your curiosity and passion for AI and computing in your cover letter or summary.
- Highlight specific experience with diagnostics software, ASIC validation, or stress-testing hardware.
- Showcase hands-on debugging skills using JTAG, hardware interfaces, and system-level tools.
- Demonstrate successful cross-functional collaboration with firmware, ASIC, and manufacturing teams.
- Deepen knowledge of RISC-V architecture and SoC bring-up processes.
- Improve proficiency in low-level programming and hardware debugging techniques.
面试指南
- Use the STAR method to detail specific debugging scenarios, emphasizing the tools used and the root cause found.
- Focus on system-level thinking, explaining how your diagnostics bridge hardware and software validation.
- Can you walk me through a time you debugged a complex system-level issue using JTAG or similar tools?
- How do you approach designing diagnostics software for stress-testing a new ASIC?
- Describe your experience collaborating with firmware and ASIC design teams.
- How do you ensure your diagnostics infrastructure is scalable and reusable?
- Review low-level hardware debugging techniques, JTAG protocols, and SoC validation methodologies.
- Prepare examples of cross-functional collaboration and how you handled technical disagreements or complex blockers.
职位点评
薪资福利
The role is at the Staff level, which typically commands a highly competitive salary, and the JD explicitly mentions a highly competitive compensation package.
成长发展
Working on cutting-edge AI compute and RISC-V offers exceptional technical growth, with a dedicated 'What You Will Learn' section highlighting pre/post-silicon validation and cross-functional collaboration.
工作生活
The role is explicitly hybrid, offering some flexibility, but the high technical complexity and Staff-level expectations may demand significant focus and time.
使命价值
The company is revolutionizing AI computing with custom RISC-V CPUs, offering a strong sense of mission and impact on the future of AI technology.
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