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Senior Analog Designer (Power Management)

Senior Analog Designer (Power Management)

发布于 大约 1 小时前

普通员工/个人贡献者

Hong Kong - China
高级经验
全职员工
仅现场办公
硕士
芯片设计
Analog Ic Design
Eda Tools
Pmic
Semiconductor
Silicon Bring-Up

AI 估算 · 40k–70k

Senior analog IC design role in Hong Kong semiconductor industry; high skill demand and competitive market.

职位详情

关于这个职位

Join a leading semiconductor company as a Senior Analog Designer specializing in power management ICs. You will lead the design and development of next-generation PMIC products from concept to mass production, driving innovation and mentoring junior engineers. This is a high-impact technical role with ownership of complex circuit designs and silicon bring-up.

最低要求

Education & Experience:

Degree: Master's or Ph.D. degree.
Major: Electrical Engineering (EE) or Microelectronics.
Experience: 5+ years of proven experience in Power Management IC design (Analog/Mixed-Signal).
Track Record: Demonstrated success in taking multiple chips from concept to high-volume mass production.
Skills & Competencies:
Technical Foundation: Deep understanding of analog/mixed-signal IC design, semiconductor physics, and IC design flows.
Power Expertise: Expert-level knowledge of power systems, including topologies, control schemes, stability analysis and compensation techniques.
Problem Solving: Proven ability to diagnose and resolve complex silicon issues (e.g., stability, noise, EMI, thermal) without precedents.
Leadership & Communication: Excellent communication skills with the ability to lead cross-functional teams and present technical strategies to stakeholders.
Time Management: Strong organizational skills ensuring on-time project delivery in a fast-paced environment as a design lead.
Tool Mastery: Expert proficiency in industry-standard EDA tools for circuit design and verification.

工作职责

Architecture & Definition: Lead product specification definition, architecture selection, and process node evaluation for new PMIC families.

Advanced Circuit Design: Architect and implement critical circuit blocks from transistor level to system level, ensuring robustness across PVT corners and high-volume manufacturing readiness.
Verification Strategy: Define comprehensive simulation plans, corner cases, and verification methodologies to guarantee first-pass silicon success.
Layout & Integration: Direct physical layout implementation, enforcing strict matching, symmetry, and parasitic control strategies.
Silicon Bring-up & Debug: Lead post-silicon characterization, root-cause analysis of failures, and performance optimization.
Production & Yield: Collaborate with Test and Product engineers to develop production test plans, optimize test time, and drive yield improvement initiatives.
Innovation & IP: Propose novel circuit ideas, drive IP creation and file patents.
Documentation: Author definitive application notes, guidelines, data sheets, and related materials.

优先资格

Better to have capability of scripting for automation.

AI 洞察

优缺点分析

优点

  • MPS is a leading semiconductor company with strong growth.
  • High-impact role with end-to-end product ownership.
  • Opportunity to work on cutting-edge power management technology.
  • Fast-paced environment with complex technical challenges.
  • Requires deep expertise and continuous learning.
  • Significant responsibility for silicon success and tape-out.
  • Ideal for experienced analog designers seeking technical leadership and innovation in power management.

缺点 / 挑战

暂无明显挑战项

角色解读

  • Progress to Principal or Distinguished Engineer roles.
  • Move into technical leadership or architecture positions.
  • Opportunity to shape product roadmaps and drive innovation.
  • Lead the architecture and design of next-generation Power Management ICs (PMIC).
  • Own the full product lifecycle from specification to mass production.
  • Mentor junior engineers and drive technical innovation.
  • Deep expertise in analog/mixed-signal IC design.
  • Expert knowledge of power topologies and control schemes.
  • Proficiency with EDA tools and silicon debug.

申请策略

  • Demonstrate end-to-end project ownership in your application.
  • Show enthusiasm for innovation and patents.
  • Highlight successful tape-outs and high-volume mass production experience.
  • Emphasize expertise in power management circuit design.
  • Showcase leadership and mentorship experience.
  • Review advanced control loop stability and compensation techniques.
  • Familiarize with latest PMIC architectures and EDA tools.
  • Improve scripting skills for automation.

面试指南

  • Use STAR method: Situation, Task, Action, Result.
  • Highlight your role and technical decisions.
  • Quantify results with performance metrics.
  • Describe a complex power IC design you led from concept to production.
  • How do you ensure stability across PVT corners?
  • Tell us about a time you debugged a challenging silicon issue.
  • Prepare detailed examples of your design projects.
  • Study MPS products and technology roadmap.

职位点评

73
综合评分

Senior analog design role in leading semiconductor company, strong technical growth, moderate work-life balance.

从薪资福利、成长空间、工作节奏和岗位方向综合评估,方便横向比较。

更适合这类人
Best suited for engineers motivated by technical mastery and innovation, who can handle a demanding on-site role.
表现最好
成长发展
相对薄弱
工作生活
薪资福利75
成长发展82
工作生活55
使命价值80

薪资福利

75中等

Competitive salary in semiconductor industry, stable company, but no explicit benefits mentioned.

薪资信号未披露(AI估算:40K-70K/月)

成长发展

82较高

High technical depth and leadership opportunities, strong skill growth potential.

技术前沿主流现代技术
技术栈Analog、Mixed-Signal、Power Management、PMIC、EDA、Control Loops
成长机会Mentorship、Innovation、Technical Authority
业务类型ambiguous

工作生活

55较低

On-site work in Hong Kong, no explicit WLB signals, likely demanding role.

工作模式仅现场办公
办公地点未明确
加班情况未提及(无法判断)

使命价值

80较高

Contributes to energy efficiency and sustainability through advanced power management technology.

行业发展高速增长赛道
社会影响正向社会影响力较高
使命信号sustainability、make a difference、power our world
创新程度积极采用新技术
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