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Test Development Engineer

Test Development Engineer

发布于 大约 14 小时前

普通员工/个人贡献者

Hsinchu - Taiwan
中级经验
全职员工
仅现场办公
硕士
硬件工程
Ate
Debugging
Power Ic
Test Automation
Cadence Pcb
Production Release

AI 估算 · 10k–18k

Mid-level test engineer in semiconductor industry in Taiwan. Salary range based on market data for similar roles.

职位详情

关于这个职位

This position focuses on developing ATE test solutions for power management ICs, including test program coding, debugging, and production release. You will work on circuit design for precision measurement and dynamic signal analysis, and collaborate with global teams to ensure quality and manufacturability.

最低要求

MS in Electrical Engineering or similar areas.

Experience in power IC function test and know automatic testing flow.
Experience in Cadence PCB layout.
Good written and oral communications skills in English and Chinese.
Good teamwork and interpersonal skills to work with IC developers worldwide.
Willing to travel in China and worldwide subcontractor.

工作职责

Designs component-level circuits for precision parametric measurement, dynamic signal analysis and creates automated test system software for analog and mixed-signal integrated circuits.

Involved in all phases of product development: design for testability, IOS, test hardware and software design, hands-on debugging, correlation, characterization and production release.
Possesses knowledge of major concepts of test engineering and has the ability to apply these concepts to a wide range of complex assignments.

优先资格

Power management IC function/application experience is a plus.

AI 洞察

优缺点分析

优点

  • Work on cutting-edge power semiconductor technologies with a leading company in the industry.
  • Hands-on experience across the full product development lifecycle from design to production.
  • Opportunity to collaborate with international teams and travel globally.
  • Requires strong technical depth in both hardware and software, which can be demanding.
  • Need to manage tight production deadlines and complex debugging tasks.
  • Travel requirements may impact work-life balance.
  • Engineers who enjoy hands-on technical work in a fast-paced semiconductor environment and have a passion for test and quality.

缺点 / 挑战

暂无明显挑战项

角色解读

  • Progress to senior test engineer with deeper expertise in specific test domains.
  • Move into test manager or technical lead roles overseeing test teams and strategies.
  • Transition into design or product engineering roles with broader product development scope.
  • Design and develop automated test solutions for power management ICs, including hardware and software components.
  • Perform hands-on debugging, characterization, and correlation of test results to ensure product quality.
  • Collaborate with design, product, and manufacturing teams across different sites to release products to production.
  • Strong knowledge of analog and mixed-signal circuit design and test methodologies.
  • Proficiency in ATE test platforms and programming (e.g., Teradyne, Advantest).
  • Experience with Cadence PCB layout tools and schematic design.
  • Good communication and teamwork skills to work in a global environment.

申请策略

  • Tailor your resume to match the essential functions listed in the job description.
  • Prepare to discuss specific examples of test correlation and production release challenges you have overcome.
  • Emphasize experience with ATE test development and power IC testing.
  • Highlight specific projects where you designed test circuits or automated test scripts.
  • Showcase PCB layout skills using Cadence and any relevant board-level debugging experience.
  • Include examples of cross-functional collaboration and problem-solving in complex assignments.
  • If not already proficient, gain hands-on experience with ATE platforms like Teradyne or Advantest.
  • Deepen understanding of power management IC topologies and their test requirements.

面试指南

  • Use the STAR method (Situation, Task, Action, Result) to structure behavioral answers.
  • For technical questions, demonstrate systematic thinking: define the problem, propose solution, discuss trade-offs.
  • When discussing projects, highlight your specific role and contributions clearly.
  • Describe a time you debugged a complex test issue. What was your approach?
  • How would you design a test circuit for a new power management IC?
  • Explain the difference between characterization and production test.
  • How do you ensure test coverage while minimizing test time?
  • Tell us about an experience working with international teams.

职位点评

67
综合评分

Mid-level test engineer role at a leading semiconductor company, strong technical growth with on-site requirement.

从薪资福利、成长空间、工作节奏和岗位方向综合评估,方便横向比较。

更适合这类人
Candidates who prioritize technical growth and are willing to work on-site with some travel.
表现最好
成长发展
相对薄弱
工作生活
薪资福利70
成长发展80
工作生活50
使命价值60

薪资福利

70中等

The salary is competitive for Taiwan's semiconductor industry, and benefits likely include standard packages. However, no specific compensation details are mentioned in the JD.

薪资信号未披露(AI估算:10K-18K/月)

成长发展

80较高

The role involves state-of-the-art power IC testing and full product lifecycle exposure, offering strong technical growth. However, no explicit training or mentorship programs are mentioned.

技术前沿前沿/新兴技术
技术栈ATE、Power IC、Mixed-Signal、Cadence PCB、Analog Circuits
业务类型ambiguous

工作生活

50较低

The position requires on-site work in Hsinchu Science Park and involves travel, which may reduce flexibility. No explicit WLB signals are given.

工作模式仅现场办公
办公地点科技园/产业园
加班情况未提及(无法判断)

使命价值

60中等

MPS contributes to power management innovation, which has positive environmental impact. The company's mission aligns with sustainability, but the JD does not emphasize social impact directly.

行业发展高速增长赛道
社会影响正向社会影响力较高
使命信号sustainability、leading-edge products and innovation
创新程度积极采用新技术
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