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Test Development Engineering Technical Leader

Test Development Engineering Technical Leader

发布于 大约 15 小时前

普通员工/个人贡献者

Hsinchu, Hsinchu City, Taiwan
专家级经验
全职员工
仅现场办公
硕士
测试开发
Ate
Dft
Jedec
Mixed Signal Ic
Product Engineering
Soc
Vlsi
Yield Analytics

AI 估算 · 40k–70k

Senior technical leadership in semiconductor product engineering in Hsinchu Science Park. 8-12+ years of experience and expert-l

职位详情

关于这个职位

This senior technical leadership role in Cisco's Silicon Operations team is responsible for bringing up and scaling Cisco Silicon One ASICs from prototype to high-volume production. You will lead post-silicon validation, test strategy, yield optimization, and manufacturing release while collaborating with cross-functional teams and external partners. It requires deep expertise in product engineering, DFT, and data-driven yield analytics.

最低要求

Education & Experience: MSEE (or higher) in Electrical Engineering or a related field, typically combined with 8-12+ years of highly relevant industry experience in product engineering and silicon manufacturing.

Technical Expertise: Deep, expert-level background in SOC/VLSI/Mixed Signal IC bring-up, production and characterization testing, and product engineering.
Data & Yield Analytics: Strong track record of leading yield data analytics and driving high-impact yield improvements. Advanced proficiency in statistical analysis and correlation. Data Science background or nanodegrees are a strong plus.
Qualification Standards: Extensive direct experience with device qualification and deep fluency in JEDEC qualification requirements.
Test Solutions: Advanced knowledge of the cutting edge in Design for Test (DFT) architectures and ATE test solutions.
Communication: Exceptional ability to communicate concisely for action. You can seamlessly translate deep technical data into project status overviews and executive summaries for both internal and external stakeholders.
Leadership: High level of energy and motivation, with a demonstrated ability to lead cross-functional initiatives and thrive in a highly complex, matrixed environment.

工作职责

Leading Post-Silicon Validation: Drive the end-to-end post-silicon validation cycle to meet stringent Product Quality and Time-to-Market metrics.

Strategic Test & Qualification: Define, architect, and oversee comprehensive test, characterization, and qualification strategies across cross-functional teams.
Yield & Cost Optimization: Establish cost and yield drive-to targets for new products. Architect and execute strategic plans to achieve significant test time reduction and yield optimization at scale.
Manufacturing Release: Define production screening guard-band specifications based on design intent and characterization results. Lead the seamless transfer of new tests and test programs into full manufacturing release by partnering closely with suppliers and offshore manufacturing teams.
Root Cause & Failure Analysis: Direct complex component failure analysis, orchestrate containments, and drive root cause corrective actions. Act as the primary technical escalation point, working with development, manufacturing engineering, and management to resolve the most challenging technical roadblocks.
Product Qualification: Oversee product qualification and burn-in testing to JEDEC specifications.
Data-Driven Leadership: Utilize advanced statistical data, yield, and correlation analysis on massive data sets (from wafer sort to system final test) to identify hidden yield limiters and drive continuous optimization.
Mentorship: Provide technical guidance and mentorship to junior engineers, elevating the overall technical capability of the Silicon Operations team.

AI 洞察

优缺点分析

优点

  • Work with Cisco Silicon One, a highly innovative and strategically important product line for the AI networking era.
  • Be part of a global leader in networking hardware, with access to world-class engineering resources and cross-functional teams.
  • High impact role: directly influence product quality, yield, and cost for mass-scale silicon products.
  • Opportunity to mentor and lead, sharpening your technical and leadership skills.
  • High expectations and pressure to meet aggressive quality and time-to-market targets.
  • Complex technical environment requiring continuous learning of new test technologies and methodologies.
  • Frequent collaboration with offshore teams and suppliers may require flexible working hours to accommodate different time zones.
  • This role is ideal for a seasoned semiconductor product engineer with deep test and yield expertise who thrives in a fast-paced, cross-functional leadership environment.

缺点 / 挑战

暂无明显挑战项

角色解读

  • As a technical leader, you can advance to senior management positions within Silicon Operations or move into broader technical architecture roles.
  • This position offers exposure to cutting-edge silicon technology and productization strategy, opening doors to Program Management or Engineering Director roles.
  • You will build a strong network across Cisco's hardware, test, and manufacturing organizations, creating opportunities for future leadership in product engineering.
  • Lead end-to-end post-silicon validation for Cisco's next-generation Silicon One ASICs, ensuring product quality and time-to-market.
  • Define and drive test, characterization, and qualification strategies to ramp new silicon products from prototype to high-volume production.
  • Utilize advanced data analytics on massive test and yield data to identify yield limiters and optimize manufacturing cost and efficiency.
  • Act as the technical escalation point for complex failure analysis and collaborative issue resolution across internal and external teams.
  • Deep expertise in SOC/VLSI/Mixed Signal IC product engineering, including bring-up and characterization testing.
  • Strong knowledge of DFT architectures and ATE test solutions.
  • Advanced statistical analysis and yield analytics capabilities, with proficiency in data science methods.
  • Excellent communication and leadership skills to drive cross-functional initiatives and mentor junior engineers.

申请策略

  • Customize your resume to clearly show how your experience matches the specific test and yield challenges mentioned in the job description.
  • During communication, emphasize your ability to translate technical complex issues into executive-level summaries.
  • Highlight your experience in silicon bring-up, production testing, and yield improvement with specific metrics (e.g., yield increase percentages, test time reduction).
  • Showcase your expertise in JEDEC qualification and DFT/ATE test solutions.
  • Emphasize your data analytics skills, including statistical analysis and large dataset correlation in semiconductor manufacturing.
  • Demonstrate your leadership in cross-functional initiatives and mentoring junior engineers.
  • If you don't have direct JEDEC qualification experience, take a course on semiconductor reliability and qualification standards.
  • Strengthen your data science toolkit (e.g., Python, JMP, or Spotfire) to better handle massive test and yield datasets.

面试指南

  • Use the STAR method: Situation, Task, Action, Result. Focus on your specific technical contribution and quantifiable outcomes.
  • For strategy questions, outline a structured approach: define requirements, evaluate options, plan execution, and monitor via metrics.
  • Communicate data-driven decisions: always tie answers back to how you used data or technical evidence.
  • Describe a time you drove yield improvement on a complex IC. What methodology did you use and what results did you achieve?
  • How would you approach developing a production test strategy for a new mixed-signal ASIC?
  • Explain the JEDEC qualification process and which tests are most critical for high-volume production.
  • How do you balance time-to-market pressure with product quality requirements in a post-silicon validation cycle?
  • Describe a situation where you had to align cross-functional teams to resolve a critical technical issue. What was your role?

职位点评

67
综合评分

A senior technical leadership role in cutting-edge silicon validation and test, offering strong growth potential but limited work-life balance flexibility.

从薪资福利、成长空间、工作节奏和岗位方向综合评估,方便横向比较。

更适合这类人
This role is best suited for candidates who prioritize technical growth and career development, and are comfortable with an on-site, high-pressure semiconductor engineering environment.
表现最好
成长发展
相对薄弱
工作生活
薪资福利65
成长发展80
工作生活55
使命价值60

薪资福利

65中等

The role offers competitive compensation for senior engineers in the semiconductor industry, though specific salary and benefits are not disclosed in the job description.

薪资信号未披露(AI估算:40K-70K/月)

成长发展

80较高

This role provides extensive exposure to cutting-edge silicon technology and a strong platform for technical leadership development.

技术前沿主流现代技术
技术栈Post-Silicon Validation、DFT、ATE、JEDEC、Yield Analytics、SOC、VLSI、Mixed Signal IC
成长机会opportunities to grow and build
业务类型ambiguous

工作生活

55较低

This role requires on-site presence at the Hsinchu Science Park, with no mention of remote work or flexible hours, suggesting a traditional office-based schedule.

工作模式仅现场办公
办公地点科技园/产业园
加班情况未提及(无法判断)

使命价值

60中等

The role supports Cisco's strategic silicon productization, contributing to advancing networking technology; however, the direct social impact is moderate.

行业发展高速增长赛道
社会影响中性/一般
创新程度积极采用新技术
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