Monolithic Power logo
芯源系统
Test Development Engineer

Test Development Engineer

发布于 大约 2 小时前

普通员工/个人贡献者

Hsinchu - Taiwan
中级经验
全职员工
仅现场办公
硕士
硬件工程
Analog/Mixed-Signal
Ate
Characterization
Debugging
Power Ic
Production Test
Cadence Pcb Layout

AI 估算 · 15k–25k

Semiconductor industry, technical role requiring MS and experience, competitive compensation in Hsinchu.

职位详情

关于这个职位

This position is for a Test Development Engineer at Monolithic Power Systems (MPS) in Hsinchu, Taiwan. You will be responsible for new product development including ATE test solution development, test program coding and debugging, and production release. It involves designing circuits, creating automated test software for analog and mixed-signal ICs, and working across all phases of product development.

最低要求

MS in Electrical Engineering or similar areas.

Experience in power IC function test and know automatic testing flow.
Experience in Cadence PCB layout.
Good written and oral communications skills in English and Chinese.
Good teamwork and interpersonal skills to work with IC developers worldwide.
Willing to travel in China and worldwide subcontractor.

工作职责

Designs component-level circuits for precision parametric measurement, dynamic signal analysis and creates automated test system software for analog and mixed-signal integrated circuits.

Involved in all phases of product development: design for testability, IOS, test hardware and software design, hands-on debugging, correlation, characterization and production release.
Possesses knowledge of major concepts of test engineering and has the ability to apply these concepts to a wide range of complex assignments.

优先资格

Power management IC function/application experience is a plus.

AI 洞察

优缺点分析

优点

  • Work at a leading semiconductor company with innovative power solutions.
  • Gain deep expertise in ATE and power IC testing, a specialized skill set.
  • Collaborate with global teams, enhancing cross-cultural experience.
  • Hands-on involvement in full product lifecycle from design to production.
  • Requires willingness to travel frequently to subcontractors in China and worldwide.
  • High technical complexity in analog/mixed-signal testing demands continuous learning.
  • Test engineering can involve tight product launch schedules and pressure.
  • Engineers who enjoy hands-on technical work, have a strong background in power electronics, and thrive in a collaborative, global environment.

缺点 / 挑战

暂无明显挑战项

角色解读

  • Progress to Senior Test Development Engineer or Test Manager as you gain expertise.
  • Move into related roles such as Product Engineer or Application Engineer.
  • Opportunity to lead test projects and mentor junior engineers.
  • Design and develop ATE test solutions for new power IC products.
  • Create automated test software and circuits for precision measurement and signal analysis.
  • Collaborate with global IC developers through all product phases from design to production release.
  • Strong knowledge of power IC functional testing and automatic test flow.
  • Proficiency in Cadence PCB layout and circuit design.
  • Excellent communication skills in English and Chinese for global teamwork.
  • Ability to travel domestically and internationally.

申请策略

  • Tailor your resume to match the MS and power IC experience requirements.
  • Mention willingness to travel and work with global teams in your cover letter.
  • Emphasize experience with power IC test and ATE systems.
  • Highlight Cadence PCB layout projects and circuit design skills.
  • Showcase any cross-cultural or international collaboration experiences.
  • Include specific examples of debugging and characterization work.
  • Strengthen knowledge of mixed-signal test techniques and automated testing.
  • Learn more about power management IC applications and system-level testing.

面试指南

  • Use the STAR method (Situation, Task, Action, Result) for behavioral questions.
  • For technical questions, walk through your thought process step by step.
  • Demonstrate both theoretical knowledge and practical hands-on experience.
  • Describe your experience with ATE test development for power ICs.
  • How do you approach debugging a test program that fails?
  • Explain a time you collaborated with international teams to solve a technical issue.
  • What is your familiarity with Cadence PCB layout? Provide an example.
  • How do you ensure test coverage for mixed-signal circuits?

职位点评

68
综合评分

Semiconductor test engineering role with strong technical learning opportunities, competitive pay, but demanding travel and on-site presence.

从薪资福利、成长空间、工作节奏和岗位方向综合评估,方便横向比较。

更适合这类人
Candidates who prioritize technical growth and career development over work-life balance and remote flexibility.
表现最好
成长发展
相对薄弱
工作生活
薪资福利75
成长发展80
工作生活40
使命价值65

薪资福利

75中等

The salary is competitive for the semiconductor industry in Taiwan, and benefits are not explicitly mentioned but likely standard. The role is full-time and offers stability.

薪资信号未披露(AI估算:15K-25K/月)

成长发展

80较高

The job involves cutting-edge power IC testing, with opportunities to learn ATE and full product lifecycle. Growth signals are modest but present through hands-on experience.

技术前沿主流现代技术
技术栈ATE、Power IC、Cadence、Analog/Mixed-Signal
业务类型profit_center

工作生活

40较低

The position requires on-site work in Hsinchu and frequent travel, limiting flexibility. No WLB signals are provided.

工作模式仅现场办公
办公地点科技园/产业园
加班情况未提及(无法判断)

使命价值

65中等

The semiconductor industry is high-growth and MPS is a leader, contributing to sustainability. The role has a direct impact on product innovation.

行业发展高速增长赛道
社会影响中性/一般
使命信号sustainability
创新程度积极采用新技术
Watch Jobs