Develop end-to-end pre-silicon and post-silicon validation methodologies, processes, and workflows for system-level silicon security and safety circuit characterization, including voltage, clock, power and fault monitors/detection etc.
Drive the translation of new circuit features into clear productization requirements, dependencies, validation scope, and signoff criteria for silicon characterization test plans and productization methodologies. Define validation strategies for analog, digital, and mixed-signal circuits, as well as new silicon features, with a strong focus on bring-up readiness and scalable execution. Design and develop tools to automate characterization, data collection, test execution, and result analysis to improve efficiency, quality, and coverage. Enable left-shift validation for next-generation product features by bringing up new flows, tests, and PVT solutions in pre-silicon on prior-generation platforms, in close collaboration with cross-functional teams. Work closely with system architects, chip and board designers, software and firmware engineers, HW/SW application engineers, process and reliability specialists, ATE engineers, product managers, sales, and operations teams to resolve blockers, align validation targets, and drive milestone readiness. Continuously explore and apply innovative approaches, including AI-driven methodologies, to solve complex design challenges and improve validation quality, efficiency, and scalability. Contribute to technical documentation and knowledge-sharing efforts that promote best practices and broader adoption of AI-enabled methodologies.